Job Details

Job Information

Physical Synthesis CAD Engineer
AWM-745-Physical Synthesis CAD Engineer
10/27/2025
11/1/2025
Negotiable
Permanent

Other Information

www.apple.com
Austin, TX, 78703, USA
Austin
Texas
United States
78703

Job Description

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Role Number: 200627195-0157

Summary

Do you want to directly impact the performance of every iPhone, iPad, and Mac? You'll push the boundaries of physical synthesis for Apple's cutting-edge processors, solving problems that determine whether our next-generation CPUs, GPUs, and NPUs can deliver breakthrough performance while maintaining industry-leading power efficiency.

Description

You'll own the synthesis challenges that matter most to Apple Silicon. You will apply your hands-on skills in developing, improving and supporting the implementation flow from RTL through GDS signoff. You will be directly responsible to improve physical synthesis techniques through innovative scripts, flows and automation.

As the synthesis and flow expert, you'll partner closely with design teams to define what works best for their specific challenges. You'll develop the methodologies, tools, and optimized flows that enable design teams to achieve breakthrough PPA results. You'll push beyond conventional synthesis limits - developing innovative techniques and proving their effectiveness by running full validation flows from RTL through place-and-route and timing signoff to show actual PPA improvements. Your optimizations will directly translate to faster, more efficient Apple devices.

You'll work directly with EDA vendors to shape tool roadmaps, build custom solutions for problems that push beyond industry standards, and see your work ship in millions of devices.

Minimum Qualifications

  • Experience with TCL, Python or Perl scripting languages

  • Experience with industry standard Synthesis tools such as Fusion Compiler or Genus

  • Experience working with CAD Tools & flow

  • Minimum requirement of BS + 3 years of relevant industry experience

Preferred Qualifications

  • Experience in CAD flow or FE methodology development

  • Experience with Low Power implementation flows (UPF) is a plus

  • Experience with logical equivalence tools such as Conformal LEC and/or Formality is a plus

  • Experience in linting, static timing analysis, low power checks (UPF) or place and route tools is a plus

  • Proficiency with TCL, Python or Perl scripting languages strongly preferred

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant (https://www.eeoc.gov/sites/default/files/2023-06/22-088_EEOC_KnowYourRights6.12ScreenRdr.pdf) .

Other Details

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